Field of the Invention
The present invention is related to a semiconductor device and a manufacturing method thereof. In particular, the present invention is related to a tunneling field effect transistor (TFET) device and a method for manufacturing the TFET device.
Description of the Related Art
Generally, a tunneling field effect transistor (TFET) may be a gate-controlled reverse-biased PIN diode. FIG. 1 illustrates a schematic diagram that illustrates a structure of a TFET. The schematic diagram may represent a cross-section that is taken alone the channel direction of the TFET. In the TFET, the N+ doped region is a drain region, and the P+ doped region in a source area. FIG. 2A and FIG. 2B illustrate operation of the TFET illustrated in FIG. 1. As illustrated in FIG. 2A, when a positive gate bias is applied, the potential of the channel region may be reduced, such that the barrier between the source region and the channel region may become substantially thin. As a result, electrons can tunnel from the source region to the channel region and then drift to the drain region under the effect of the electric field. OFF state. As illustrated in FIG. 2B, the barrier between the source region and the channel region may become substantially thick, such that tunneling may not occur.
In comparison with a conventional metal-oxide-semiconductor field-effect transistor (MOSFET), a TFET may have a relatively smaller sub-threshold swing (SS) and therefore may have a relatively smaller on-state-off-state voltage swing. At room temperature, the minimum SS of a conventional MOSFET may be 60 mV/dec, and the minimum SS of a TFET may be smaller than 60 mV/dec.
Advantages of a TFET may include low leakage current, small SS, low power consumption, etc. Nevertheless, conventional TFETs are typically based on lateral tunneling. Limited by tunneling area and tunneling probability, the on-state current of a conventional TFET may be undesirably small, such that application of a conventional TFET device may be limited.